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Wen was a Senior Member of Consulting Staff at Cadence prior to founding Altos, responsible for the mixed signal integrity analysis tool SeismIC. Prior to CadMOS, he worked at Cadence developing Virtuoso XL and ADE (Analog Design Environment). Wen has also worked as a custom designer and EDA lecturer at the HsinChu Science Park, Taiwan. He has 16 years experience in EDA. | 