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Jonathan Park has a comprehensive and in-depth experience in the ASIC and programmable logic arenas. Prior to joining eASIC Park worked for Altera Corporation as Director of Design Engineering and Design Centers. In this position he was involved in the development of the Hard Copy Products, design flow and methodology. Park was granted 2 patents (additional 3 are pending) related to the Hard Copy technology and is the sole inventor of 4 of these patents.
Previously, Park served as Director of Design Center and Methodology at Chip Express, developing RTL signoff and automation methodologies. Earlier in his career, Park held senior engineering positions at AMIS and LSI Logic where he developed gate array architectures and design methodologies.
Jonathan Park holds B.Sc. and M.Sc. in Electrical Engineering from the University of Utah. | 