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Chan Lee joined Ambarella in 2004 and is vice president of VLSI.
Prior to Ambarella, Lee was the director of VLSI at Afara Websystems before it was acquired by Sun Microsystems. He was responsible for managing the design and verification engineers, and drove and developed several key design and verification methodologies.
From 1995 to 2000, Lee worked at Intel as a design manager of Willamette (the first-generation Pentium 4) and was responsible for managing front-end (logic design, verification) and back-end (circuit design, layout and assembly) design. Lee was also responsible for driving and managing full-chip RTL development and coordination, and methodology development for the project. After the Willamette tape-out, Lee went on to manage the silicon debug team and production ramp, which included functional and structural test writing, fault grading and scan-based ATPG development and debug. From 1991 to 1994, Lee was a manager and a technical lead on the P6 (Pentium Pro). The P6 design was proliferated and reused in the Pentium 2, Pentium 3, Pentium Xeon and Pentium M family.
Lee began his career as a logic designer on the P6 and was responsible for the front-end design of the chip. During the project, he was responsible for managing a team of logic, circuit and mask designers, and for the debug and coordination of the full-chip RTL development. As a result, Lee became one of the key system debug experts on P6 following tape-out. | 